From: Spiro Trikaliotis (ml-cbmhackers_at_trikaliotis.net)
Date: 2005-04-27 08:14:07
Hello,
thank you for jumping in.
* On Tue, Apr 26, 2005 at 06:16:15PM +0200 Patrycjusz R. ?ogiewa wrote:
> It has the same double BVCs in question but of course I can't really
> explain why is this needed. Since I am now also up to similar matters
> (I am trying to adapt some software to work with DD3), I can only add
> my voice to the chorus "can someone explain that?"
From discussions here, on another ml and via PM, I am sure that the
first BVC is for being sure that the byte has been latched into the
shift register, while the second bvc is for being sure that the byte has
been shifted out of the shift register.
Thus, the write routine in the ROM is wrong, but it does not do any harm
since the read routine does not check the last bytes at all.
> STY $C1 ; buffer position merken
^^^^^^
Is this German? ;-)
> LDA #$55
> LDX $45
It would be interesting where this $45 comes from. In fact, calculating
the inter-block gap is the most interesting part for me now. If this gap
is choosen wrong, there may be problems using a disk formatted on one
drive on another drive.
Regards,
Spiro.
--
Spiro R. Trikaliotis
http://www.trikaliotis.net/
http://cbm4win.sf.net/
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