Konrad B wrote: > Kuba (aka Yakubed) - the guy who is improving the MiniMig and also > designed the ARM controller for it, told me Xilinx tools are better at > P&R when the design is close to the 100% resource usage. Where Altera > would already fail, Xilinx is still able to P&R the design. Nitpick: "designed" the ARM controller??? I have a parameterized VHDL module that I've used in **dozens** of designs on Altera silicon. It'll synthesize - but not work - on Xilinx devices for smaller parameters. For larger parameters, it won't even synthesize, just sits there for literally hours trying to build. So I'd take that claim with a grain of salt... Regards, -- | Mark McDougall | "Electrical Engineers do it | <http://members.iinet.net.au/~msmcdoug> | with less resistance!" Message was sent through the cbm-hackers mailing listReceived on 2010-08-19 13:00:27
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