On Wed, Dec 07, 2011 at 11:24:07PM +0100, Segher Boessenkool wrote: >>The row address is the low-order 6 bits, right? > >Low eight on the VIC-II in the C64 (there is a mask option to make it >low seven, to work with 16k DRAM chips). Right, low 8 on the VIC-II, but I was thinking of the 4164 memory chips. >It doesn't matter, the row addresses are always delivered to the RAM, >whether the VIC is reading from ROM or open bus or whatever. The PLA >selectively switches off #CAS only, not #RAS. Right, I forgot about this and was too lazy to check the schematic diagram. So, there is no way to prevent the memory refresh then, I guess. The Z80 folks have it easier, don't they? :-) >Here's my PLA decode for Ultimax mode: Thanks. FWIW, Jens Schönefeld posted the C64 PLA truth table on German Z-Netz in the autumn of 1994. He had built an adapter that makes the 82S100 PLA look like a 27512 EPROM. Back then, I managed to reverse engineer the equations for all signals except CASRAM, which remained too complex to be plausible. Verification was by a program that computes the truth table by feeding all 65536 input combinations to the 8 equations, and by comparing the resulting 64KB file with the PLA truth table dump. Some time later, it turned out that the PLA does support negation, and the CASRAM equation became a lot simpler. The file on Zimmers, which I originally archived on FUNET, is dated July 1995: http://zimmers.net/anonftp/pub/cbm/firmware/computers/c64/c64pla.txt If I remember correctly, I sent the chip to be read. It was from my oldest C64, serial number 32xxx, with ceramic DRAM chips (350ns IIRC) and 6569R1 and so on. Marko Message was sent through the cbm-hackers mailing listReceived on 2011-12-08 09:00:08
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