Spiro Trikaliotis <ml-cbmhackers@trikaliotis.net> writes: > The "broken" here is relative - at least, we thought so. Ah, so you've been playing with hidden cards all the time and expected people to guess the answers you were looking for without all the information they need to find those answers? Nice. > Why does it know this? Because the uZoomfloppy goes to the VIA chip > directly, getting the data pins from that one. That's why there is no > ATN trap anymore. It's still there and you can still see what it does - it's visible on the logic analyzer trace that was posted here. > Obviously, we neglected an effect when ATN is deasserted (put high > again). Thus, we try to find out the reason of this effect, and if > anything can be done about it. With all the additional information that has been revealed by now I'm not sure why the drive doesn't react to ATN at a later point. If the interrupt is triggered[1] $7c should be set to 1 and the only place where it is reset according to the cross-reference in AAY1541 is in the ATN handler which will pull DATA_bus low unconditionally. If you want to figure out what the CPU actually does I recommend adding a few of the lowest address lines (A0-A2 should be enough, A0-A3 are a bit more convenient) to the logic analyzer trace and possibly SYNC to see which cycles are instruction fetches. Tracing IRQ may show if the interrupt is accidentally cleared before it is handeled - but the only access to $1801 in a stock rom is in the subroutine that sets $7c and I really hope you're not experimenting with a drive with any kind of parallel speeder in it. -ik [1] I don't see why it wouldn't be - IRQ is level-sensitive, so even if the drive is running with interrupts disabled it will show up when interrupts are reenabled. Message was sent through the cbm-hackers mailing listReceived on 2012-03-30 20:00:36
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