Re: FPGA (was: 6809 / 6702 puzzle)

From: davee.roberts_at_fsmail.net
Date: Tue, 24 Apr 2012 20:00:36 +0200
Message-ID: <9530266.194181335290436718.JavaMail.www@wwinf3703>
Gerrit,

Good call.

Dave


> Message Received: Apr 24 2012, 06:02 PM
> From: "Gerrit Heitsch" <gerrit@laosinh.s.bawue.de>
> To: cbm-hackers@musoftware.de
> Cc: 
> Subject: Re: FPGA (was: 6809 / 6702 puzzle)
> 
> On 04/24/2012 05:34 PM, davee.roberts@fsmail.net wrote:
> > Hi Guys,
> >
> > A few things that came to mind:
> >
> > 1.
> >
> > The simplest solution would (as has already been said) to utilise some
> > 'real' INTEL chips (e.g. 8088, 8259A etc.) and to put the majority of
> > the 74LS devices into a 5V-tolerant CPLD. I would then use a separate
> > CPLD to host the 6525/6526 combo (as these chips appear to be
> > intertwined with each other and it would appear to be silly to implement
> > the two separate chips in two CPLDs).
> 
> On the other hand, the 6526 is also used in the C64 and C128 and the 
> 6525 can be found in the 1551 and CBM-II series. So it might not be a 
> bad idea to design them as seperate cores so they can be used for 
> replacing dead chips in the other systems. Especially nice would be a 
> 28pin version of the 6525 since that one is used in the 'paddle' of the 
> 1551, usually labeled '6523T'.
> 
>   Gerrit
> 
> 
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> 

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Received on 2012-04-24 19:00:10

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