This looks like it could reproduce the output with one addition: a control register for the shift registers that turns individual shift registers on or off. We know this control register exists because bits 3 and 5 are initially off and are turned on if the correct input is received. In the case where the output for a bit is all 0 or all 1, the shift register is turned off. This occurs when the corresponding bit of the input is changed and the current output of the shift register is high. Presumably, this bit could be turned back on, by some method yet to be determined. Also, we do not know what happened to the output bit of the shift register. Was it also turned off, or was it left high? On Sat, 26 May 2012, Rhialto wrote: > In my model of the 6702 I've replaced William's shift register with a > complicated reload with a circular register. If a 1 shifts out, it > toggles the output bit, and it comes back on the left. > > A changing input bit also changes the bit on the left (so its change > will be visible only in the future). > > That model gives me the code below, which predicts the patterns above, > and the more complicated one that I've quoted. Unfortunately it doesn't > pass the validation routine but I haven't looked into the difference. wlevak@sdf.lonestar.org SDF Public Access UNIX System - http://sdf.lonestar.org Message was sent through the cbm-hackers mailing listReceived on 2012-05-28 11:00:06
Archive generated by hypermail 2.2.0.