> It's the classic AND-OR-INVERT (AOI) logic, also called "sum of > products". > > http://en.wikipedia.org/wiki/AND-OR-Invert Indeed. > Heh. For those that don't know, a CPLD/FPGA implements a lookup table > using SRAM or flash. Sorry for objecting, but that's only true for an FPGA, but not for a classical CPLD. A macrocell of a CPLD is only "little" more complex then a PLA with an additional Flipflop at the output. Yes, some more stuff is in there too... But the combinatorial part of each macrocell is AOI. A very good description is in this datasheet (page 5), similar applies also for Lattice and for other manufacturers: http://www.xilinx.com/support/documentation/data_sheets/ds054.pdf There are some things sometimes called CPLD which are actually plain FPGAs, e.g. the MachXO and MachXO2 families. Skoe Message was sent through the cbm-hackers mailing listReceived on 2012-06-05 20:00:39
Archive generated by hypermail 2.2.0.