Re: ROM Dump of Amiga Keyboard controller

From: Gerrit Heitsch <gerrit_at_laosinh.s.bawue.de>
Date: Sat, 28 Jun 2014 19:10:22 +0200
Message-ID: <53AEF6FE.5050405@laosinh.s.bawue.de>
On 06/27/2014 09:52 AM, Greg King wrote:
> It seems to me that a "master, slave" microcontrollers model is the
> easiest method to implement.  You would use a fast master
> microcontroller with (at least) three I/O ports.  One master port would
> be connected to the (slow) slave's (MOS 6500/1) port C.  Another master
> port would be connected to another slave port.  One line from a third
> master port would generate the slave's clock signal.  And, two lines
> from that third port would control switches that feed 0V, 5V, and 10V to
> the slave's RESET line.
>
> You don't need to bother with the slave's RAM; the master can dump the
> ROM directly.  It feeds a sequence of
>
>      LDA $rom_address
>      STA $port
>
> instruction pairs to slave port C.  It increments the "rom_address"
> between each pair.  It toggles the RESET line between 5 and 10 volts at
> the appropriate cycles, so that the LDA can get its data from the mask
> ROM.  The master reads that data from its second port; and, stores the
> data in some place.
>
> Syncronization is easy.  The master would know how many cycles are used
> by the 6500's reset sequence.  So, the master would know exactly when to
> feed the first opcode to port C.

Interesting idea, but there are two problems with it:

1) The 6502 is not a static design (*), the datasheet mentions that the 
externally supplied clock must not be below 200 KHz. It is possible do 
to this on a 20 MHz AVR since you have 100 Cycles, but you have to keep 
it in mind.

2) The 6500/1 divides the externally supplied clock by 2 before using 
it. You have no way of knowing where the internal clock is in respect to 
the external clock so you might be off by half a cycle.

(*) The 65C02 is, but the 6500/1 is not CMOS.

  Gerrit



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Received on 2014-06-28 18:00:45

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