-----BEGIN PGP SIGNED MESSAGE----- Hash: SHA1 > It could make sense to use 0x78 (SEI) as the padding byte instead of NOP. > In that way, we can be more sure that there is no IRQ that would > interfere with our processing. (Does the chip contain an internal > interrupt source?) The interrupt disable flag is set on any interrupts by default (including reset). What's the reason to have SEI in there then? - -- -soci- -----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iEYEARECAAYFAlO0BAkACgkQyBOVYiJltRaOEACcDFRbSYjrbgvjmZUhBiSpO5LB ja4An1LfjvhcPKPpPoWh9IAkPnDyzLMX =0YbZ -----END PGP SIGNATURE----- Message was sent through the cbm-hackers mailing listReceived on 2014-07-02 14:00:03
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