On 2014-12-05 23:40, Gerrit Heitsch wrote: >>>>> http://www.westerndesigncenter.com/wdc/ >>>>> >>>>> "With 200MHz+ 8-bit W65C02S and 100MHz+ 8/16-bit W65C816S processors >>>>> coming on line in ASIC and FPGA forms, we see these annual volumes >>>>> continuing for a long, long time." >>>> >>>> Hmm... and nobody has ever placed this in a 64 yet? >>> >>> You think DRAM latency was a limiting factor in 1982, try with a 200 >>> MHz CPU. :-) >> >> I wouldn't insist on using the old DRAMs with this :-) > > Even with SRAM you'd need RAM with 2.5ns access time if you want to use > a 200 MHz 6502... I am not completely sure now but AFAIR 1.5ns has been achieved already a few years ago with SRAMs. > Maybe a bit slower if you don't want to share the bus > with an equally fast video chip. There is no equally fast VIC chip so it would have to be done in some intelligent way. I don't know - like using only the available bus time to run @200MHz? There was this 2MHz 6502 project for the 64. Maybe something similar, only at 200 or whatever the RAM can keep up with. -- SD! Message was sent through the cbm-hackers mailing listReceived on 2014-12-06 00:00:03
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