Re: FPGATED

From: Segher Boessenkool <*segher_at_kernel.crashing.org*> Date: Sat, 23 Jul 2016 14:08:21 -0500 Message-ID: <20160723190821.GB13327@gate.crashing.org> · segher_at_kernel.crashing.org

On Sat, Jul 23, 2016 at 08:46:04PM +0200, Gerrit Heitsch wrote:
> On 07/23/2016 08:22 PM, Segher Boessenkool wrote:
> >On Sat, Jul 23, 2016 at 06:29:33PM +0200, Michał Pleban wrote:
> >>>Next project would be a replacement 8501 since those also die easily...
> >>
> >>That should be much easier, as no analog stuff (video) is needed and a
> >>6502 core is easily obtainable... Somebody should really make such
> >>project :-)
> >
> >The visual6502 project has a die picture of an 8501.  From the picture
> >it seems clear that both the 8500 (c64c) and 8502 (c128) used the same
> >silicon, with different contacts bonded out.
> 
> You sure? The 8501 is missing Port-Bit 5. It's not only not bonded out, 
> it's not present, you can't set it while the 8500 has all the port bits, 
> you can set them.

(bit 5?  Do you mean bit 7?)

No, of course I'm not sure, would need die pics of those others to be
sure ;-)

There very likely are minor differences, at least the die marking.

The 8501 die physically only has 7 port bits.  It isn't trivial to change
the layout so there is room for 8.

Why do you think you can set all port bits on the 8500?

Segher

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