Den Fri, 27 Oct 2017 05:34:22 +0000 skrev "Baltissen, GJPAA (Ruud)" <ruud.baltissen@apg.nl>: > Hallo Michał, > > > > Of course it will not work. Even though BP0-BP3 have the correct > > value, memory access is still governed by RAS and CAS on the J2 > > port which go to DRAM. The chips in bank 15 cannot see these > > signals. > > Yes, but worse: the 8088 card doesn't provide the needed address > lines. Completely overlooked that :( Yes, you'd have to demux the muxed adress lines that's meant for the DRAM's. B.t.w. while looking at the circuit diagram my impression is that it would be rather easy to expand the memory on a CBM-II machine. It could be done with more banks and/or with larger banks. If opting for more banks the PLA 82S100 in U75 would have to be complemented with another with similar content but which treats BP0-3 differently to map the extra memory in other banks than 1-4. If opting for the same number of banks but larger memories in one or more banks it's just a matter of mainpulating BP0-3 on it's way to this PLA. Also if opting for larger memories there would be a need to substract 1 from the BP0-BP3 signals and then mux the resulting BP0 and BP1 (or maybe even more signals) onto "new" inputs on larger DRAMs. Seems rather straight forward. Either way it would probably not need much special attention to make it compatible with the 8088 board. Is the U75 PLA socketed on CBM-II boards? As I understood from this thread, the first two banks of DRAM is usually soldered directly to the board while the last two banks is usually socketed. Is this correct? -- (\_/) Copy the bunny to your mails to help (O.o) him achieve world domination. (> <) Come join the dark side. /_|_\ We have cookies. Message was sent through the cbm-hackers mailing listReceived on 2017-10-27 13:00:03
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