Re: Hardware emulation of 6509 using 6502?

On 11/8/2017 8:35 AM, Michał Pleban wrote:
> Jim Brain wrote:
>
>> You can reprogram the CPLD once it is soldered, but one has to have a
>> JTAG programming device (which is not in everyone's toolbox) to do so.
>> If you were in the US, just swapping boards to you would be no big deal,
>> but your location makes this a bit tougher (Steve is in Canada, I think,
>> which is not a ton better, and Andre, not sure, but sure it is not USA :-)
> I can buy a Xilinx programmer if the cost is not prohibitive.
They are bout USD$25.00 on eBay.  DLC9 is the part number.
>
>
> I looked at your schematic, and I think you might want to connect PHI2
> to the CPLD. Right now you have only PHI0 but I am not sure it that's
> the right clock to do what we want to do.
OK.  Will do.
>
> Also, with the current schematic, writing to $0 and $1 will also cause
> writing to underlying RAM, which should not be a problem normally as the
> bank 0 is empty, but maybe it's better not to do it. In this case, you
> would want to route R/W signal through the CPLD from 6502 to 6509.
As others have noted, it mimcs 6510 behavior, so I'd prefer to not work 
too hard to avoid it.
>
> Also, what is the signal N$1, it is labeled on the CPLD but I cannot
> find it elsewhere?
It was a wire that is not connected to anything else.  I removed it.

Jim


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