Re: upgrading CBM-3040?

----- Original Message ----- 
From: "Francesco Messineo" <francesco.messineo@gmail.com>
To: <cbm-hackers@musoftware.de>
Sent: Monday, November 13, 2017 1:48 PM
Subject: Re: upgrading CBM-3040?


> On Mon, Nov 13, 2017 at 7:37 PM, Mike Stein <mhs.stein@gmail.com> wrote:
>>
>> ----- Original Message -----
>> From: "Francesco Messineo" <francesco.messineo@gmail.com>
>> To: <cbm-hackers@musoftware.de>
>> Sent: Monday, November 13, 2017 11:33 AM
>> Subject: Re: upgrading CBM-3040?
>>
>>
>>> On Mon, Nov 13, 2017 at 3:17 PM, william degnan <billdegnan@gmail.com> wrote:
>>>> Yes.  There was an upgrade kit.  If you can find the chips or steal them
>>>> from a 4040 drive here is what I found:
>>>>
>>>> Replace the 6530 with the CBM chip 901466-04
>>>> UL1 gets a 901468-12
>>>> UJ1 gets a 901468-11  (take from 4040 UK1)
>>>> UH1 gets a 901468-13
>>>
>>> ok, the last three chips can be 2532 EPROMs with the right content, no
>>> problems here.
>>> Looking at the schematics, it seems that the 6530's ROM is selected by
>>> /RS0 only, so in theory, I could
>>> make an adapter to tie /RS0 of the original 6530 high, and use the
>>> select signal to enable another external EPROM for the new
>>> code. The rest of the 6530 should continue to work as expected, am I right?
>> ---
>> Some drives use 2332s with an active-high chip enable and it looks like that's the case with the 2/3/4040 drives' CS2, so you might also have to add an inverter in order to use 2532s.
> 
> 
> right.... clock phi2 from the 6502 (buffered) goes to pin21 of all the
> ROMs. It prevents the ROMs to be selected during the low part of phi2.
> Now I'm puzzled, what would drive the data bus during the low part of
> phi2 that they had to prevent a possible bus conflict?
> 
> Frank
---
Isn't that when the 6504 takes control of the bus?

m


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