Re: Unknown holes in the motherboard of the CBM610

Den Sun, 29 Apr 2018 09:24:41 +0200 skrev Ruud@Baltissen.org:
> Hallo Mia
> 
> 
> > The magic that's mostly on page 2 is a shift register...
> 
> Nice to know that there is somebody around who was able to make some
> sense of it :) Just one thing comes to my mind: I'm quite sure that
> part of it is used to generate CAS and RAS. If we switch to SRAM, is
> it possible to simplify things and to switch to a 8 or 4 MHz main
> clock?

Maybe it could be a bit simpler, but I see no reason for throwing away
that possibility to control timing exactly. The 18MHz clock is needed
for the pixel clock anyways (unless the CRTC and it's surrounding
hardware is replaced with something else. I can't remember who but
someone on this list made some hardware that produces a VGA compatible
output signal).

> > As an error in the pinout of the 6509 data sheet weren't publicly
> > known until early this year, there might be more errors lingering
> > that we don't know about.
> 
> Big OOPS, I completely forgot about that! Could you do me a favour
> and write what the error exactly was? At this moment I haven't even
> an idea in what thread to look for in the archive. TIA!

The clock signals are mixed up. See this:
http://archive.6502.org/datasheets/mos_6509_mpu.pdf

> > Prio 1: Get rid of the 6509 and 6525's.
> 
> I don't mind about getting rid of the 6509 as well because it is rare
> as well. But a condition is that the replacement is 100% compatible.

A NMOS 6502 with Jims circuit should be 100% compatible.

> > Btw, are the 6551 compatible enough with a 6850?
> 
> Eh, why mentioning the 6850, because you like it more than the 6551
> or did I miss something?

Sorry, I don't know why I thought they were somewhat compatible...

> > One thing I would really like to have is hardware that can remap
> > various stuff so it could emulate a PET too.
>  
> See later.
> 
> 
> > Sorry for feature creeping ;)
> 
> NP, I do the same all the time as well.

:)

> Hallo Jim,
> 
> 
> > I think that leaves 2 options:  DIP parts/CPLD/RAM/FLASH, or
> > Full FPGA/RAM/FLASH/SID...
> 
> I think you hit the nail right on it head. The last option makes it
> possible to do everything like including the 8088 board and the
> remapping for the PET. But being a guy that loves to play with
> ICs.... Very difficult indeed. But first things first: the schematics.

... and with a FPGA replacing most stuff, we might aswell run VICE or
similar...

> Regarding developing just one board: what about a main board plus a
> small one for the 6x0 and 7x0 that only contains the various
> connectors? A 96-pins DIN connector could connect the two boards. And
> I'm sure we can work out something similar for the keyboard connector
> of the 7x0 as well. OTOH, what would it cost to produce to separate
> boards?
> 
> Just my two cents.

Well, unless everything goes well in the first try, it would certainly
be cheaper to just replace one smaller faulty board instead of a larger
board. So assuming there would be atleast one "bad" prototype it seems
like a two board solution would save money in the long run. When it
actually works everything could be integrated on a single board.


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