Re: Unknown holes in the motherboard of the CBM610

From: Francesco Messineo <francesco.messineo_at_gmail.com>
Date: Mon, 30 Apr 2018 22:46:44 +0200
Message-ID: <CAESs-_zJABHcTfRS6zBVqUAXJwo2ya5C9SUZ7e3-mgGAPVkRyQ@mail.gmail.com>
On Mon, Apr 30, 2018 at 8:44 PM, Mia Magnusson <mia@plea.se> wrote:
> Den Mon, 30 Apr 2018 19:59:21 +0200 skrev Gerrit Heitsch
> <gerrit@laosinh.s.bawue.de>:
>> On 04/30/2018 07:51 PM, Mia Magnusson wrote:
>> > Den Mon, 30 Apr 2018 19:08:59 +0200 skrev Francesco Messineo
>> > <francesco.messineo@gmail.com>:
>> >> On Mon, Apr 30, 2018 at 7:05 PM, Mia Magnusson <mia@plea.se> wrote:
>> >>> Den Mon, 30 Apr 2018 15:00:41 +0200 skrev MichaƂ Pleban
>> >>> <lists@michau.name>:
>> >>>> Hello!
>> >>>>
>> >>>> Mia Magnusson wrote:
>> >>>>
>> >>>>> My intention is to find some kind of suitable software for
>> >>>>> timing diagrams (I was first thinking about project management
>> >>>>> software, but there seems to be software especially made for
>> >>>>> thins purpose).
>> >>>>
>> >>>> Why not simply attaching a logic analyzer to various signals and
>> >>>> measure what the real hardware does?
>> >>>
>> >>> Everything is made of standard 74xx circuits and standard DRAM's
>> >>> (except the CPU and the CRTC) and it would be really nice to know
>> >>> that the maximum and minimum delays is for each part of the
>> >>> circuit. (The 6525's doesen't count in this discussion as their
>> >>> timing isn't critical to understanding how the complicated
>> >>> CPU-RAM-Refresh-Coprocessor stuff works).
>> >>>
>> >>> I wounder if anyone who designed or in general worked with the
>> >>> hardware on theese machines at Commodore are still alive and
>> >>> remembers some stuff? For example it would be nice to know why
>> >>> some signals are called PUP1 and PUP2.
>> >>
>> >> look if they're static pulled up to some resistor to Vcc...
>> >> PullUP1, PullUP2... Just guessing, but I use a similar naming
>> >> scheme when I design my own boards.
>> >
>> > Thanks! Yes, they seem to go to pull-up resistors.
>> >
>> > But why not just join each of those TTL inputs with +5V directly on
>> > the nearby chip?
>> >
>> > Does some 74xx IC's work better with slightly less drive to +5V on
>> > the signal that feeds the inputs?
>>
>> I don't remember where, but I read somewhere, that you shouldn't
>> connect a TTL input directly to +5V.
>
> Interesting!
>
> IIRC all data sheets indicate that anything between 2.4V and 5V is
> treated like a correct "1".
>
> Maybe it's different on different TTL families? The B series uses a lot
> of S logic.


I always referred to:
http://ecee.colorado.edu/~mcclurel/ON_Semiconductor_LSTTL_Data_DL121-D.pdf

I used to connect TTL inputs (LS family, but I don't see why it should
be different for S family) directly to VCC or GND when I didn't need
to override the pull UP/DOWN. Using resistors maybe reduces the input
current and lowers the power wasted, but max input current of LS/S
families are in the tens of uA max.
Received on 2018-04-30 23:00:03

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