Re: Unknown holes in the motherboard of the CBM610

From: And Fachat <afachat_at_gmx.de>
Date: Thu, 03 May 2018 15:03:17 +0200
Message-ID: <16326198220.27e0.b4d1f2b66006003a6acd9b1a7b71c3b1@gmx.de>
Am 2. Mai 2018 21:54:14 schrieb Mia Magnusson <mia@plea.se>:

> out" of it's own cycles. The B series does this by letting the CPU
> access memory while the 2MHz clock is in one state, and video accesses
> memory when the clock in the other state. 8296 runs memory at the same
> speed and lets video do two accesses in the same time that the CPU does
> one access. The older 8032/8096 uses 16 bit wide video memory for video
> to be able to read at 2MHz rate for 80 columns. The older PET's and
> VIC-20 is just like the B series but at 1MHz.

Not to forget the original PET that use 1MHz video and suffer from snow 
when the CPU accesses the memory during visible screen area. That's why the 
original kernal waits for the vertical retrace before printing anything. 
Switching the sensor input for the retrace to output disables the check to 
speed up printing, but is called killer poke for some of the newer machines....

 >C64 & co is a special
> case as it has an internal 40 word cache (where a word is 12 bits, 8
> bit char and 4 bit color ram, or in hires 8 bits color and 4 bits
> discarded, or in multicolor 12 bits of color) which is read every 8th
> line by locking out the CPU from the bus during 40 cycles.


> But I thing that if this is changed significally then it's not really a
> B machine any more :)

I agree :-)

André
Received on 2018-05-03 16:00:02

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