Re: C128 memory - B series compatibility - Basic using 256k - a new version of the hardware for 256k

From: smf <smf_at_null.net>
Date: Tue, 8 May 2018 09:55:18 +0000
Message-ID: <d2305221-1387-9c0c-10a0-16de5b8d787f@null.net>
On 08/05/2018 09:25, Mia Magnusson wrote:
>
> There are two "threads" here.

yes

> I propose some addition that is compatible to how the C128 works as it
> is. If you want more than a total of 256k, you could have extra
> registers in the D5xx area to hold additional information regarding the
> preconfiguration registers.

The reason I suggested using two unused bits and latching them when the 
preconfiguration or configuration registers were written, is that it 
becomes easy to use the extra memory from basic.

This was the problem with the "PIA" method for 512k/1024mb, but with 
latching you can POKE the bits into the register and then configure the 
BANK.

> But if some other kind of MMU scheme would be used, you can make it
> incomaptible with the existing KERNAL memory locations and just use
> more space in the FF** area.

It's fine to make it incompatible when you're running software that uses 
the extra functionality but I don't see the point in creating an MMU 
that is always incompatible, because then it's no longer a C128.

If you're going to create a 1MB computer that isn't compatible with C128 
software, then I think it's possible to come up with one that is much 
better :D
Received on 2018-05-08 11:00:56

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