Re: Strange 8255 behavior

From: Mia Magnusson <mia_at_plea.se>
Date: Tue, 12 Jun 2018 17:02:24 +0200
Message-ID: <20180612170224.00001ea7@plea.se>
Den Sun, 10 Jun 2018 14:33:41 +0200 skrev Gerrit Heitsch
<gerrit@laosinh.s.bawue.de>:
> On 06/10/2018 01:59 PM, Michał Pleban wrote:
> > Hello!
> > 
> > smf wrote:
> > 
> >> I assume for cost purposes they don't keep the last output value
> >> when in read mode, so when you switch back to output mode then
> >> zeros is probably the lesser of two evils.
> > 
> > That might be the case when you switch from input to output, but
> > when you "switch" from output to output (i.e. you leave the
> > direction of the port unchanged, only modifying some other port)
> > it's just ridiculous.
> > 
> >> Trying to replace a mos chip with an intel chip is blasphemy :-)
> > 
> > Guilty as charged :-) But it's for a good reason: there are only
> > very little 6525's laying around, and if we want to make the 8088
> > card accessible to everyone, we had to change to a chip that's
> > readily available.
> 
> How about two 6522 instead? With some clever logic and mapping of the 
> address bits, you might be able to come up with a register map that 
> comes close to what the 6525 has, limiting the amount of change in
> the code.

6821's are even cheaper. Not sure if they would fit, but worth
investigating.

Btw it could also be made using simple 74xx logic. Two 8-bit latches
with output enable could each latch written data from one CPU and gate
the outputs on read by the other CPU. Add the few extra parts needed to
handshake e.t.c. (maybe a 74**74 dual d-flip-flop could act as a kind
of interrupt controller, each half in each direction).

-- 
(\_/) Copy the bunny to your mails to help
(O.o) him achieve world domination.
(> <) Come join the dark side.
/_|_\ We have cookies.
Received on 2018-06-12 18:00:05

Archive generated by hypermail 2.2.0.