Re: Strange 8255 behavior

Den Sun, 10 Jun 2018 19:43:59 +0200 skrev Michał Pleban
<lists@michau.name>:
> Gerrit Heitsch wrote:
> 
> > It is... It can even produce IRQs when writing to $3FE / $3FF
> > (depending on side), alerting the other side that data is waiting.
> 
> This gives me the idea to create a simple circuit emulating the MDA
> hardware: get 4 of these chips and place them at B000:0000 on the 8088
> side, and somewhere in bank 15 on the 6509 side. The 8088 would write
> character data there as on every MDA, and at the same time a routine
> on the 6509 side would continually read the bytes, perform CP437 to
> PETSCII conversion, and copy them to the video memory. This would
> allow running applicatins which access the video memory directly -
> it's the major compatibility obstacle.

I would rather suggest using a really fast SRAM (fast compared to the
CPU clocks used on the 8088 and 6509) and just let both CPU's use the
same single adress/data interface on the SRAM.

To have a chance at making this work, you'd at least have to replace
the 15MHz crystal on the 8088 card with the 18MHz DOTCLK signal
available in the connector to the motherboard. Maybe add a circuit to
"mute" that 18Mhz clock until the then 6MHz 8088 syncs up with the 2MHz
6509 clock the right way for sharing memory.

Unfortunitely as I understand it the 74S374 that latches P0-P3 to
BP0-BP3 has it's outputs disabled while the 8088 is active, and then
the four 1k pull-up resistors causes all 6509 acitivity to be in bank
15 regardless what the page registers is set at. Thus it's impossible
to use more than 64k memory space on the 6509 while the 8088 is active,
even if more SRAM than fits in page 15 would be added. Thus I suggest
some separate bank switching mechanism for the 6509 side.

That way you could for example fill the whole $C0000-$CFFFF area of the
8088 address space with SRAM making it easier to emulate both CGA (text
mode only of course, or some crazy code that chooses the petscii char
that's closest to any graphics displayed) and MDA. Also it could be
used for data transfer between the 8088 and 6509, rendering the
6526/6526 or equalient interface obsolete, except of course that it
would be good to have the interrupt logic.



Or as I've been suggesting and partially planning on all along: Make a
new B series motherboard first. It could have the page/bank system on
the 6509 working even with the 8088 active. Then it could have 1MB SRAM
fast enough to be accessed by both CPU's, and it could have an ISA slot
or CGA compatible graphics hardware.



-- 
(\_/) Copy the bunny to your mails to help
(O.o) him achieve world domination.
(> <) Come join the dark side.
/_|_\ We have cookies.