Re: DMA successes with Verilog

On 6/15/2018 10:42 PM, Mia Magnusson wrote:
>
> Or maybe wait for a write operation, we can be sure that a write is
> data and not code, and after a write the CPU will fetch the next
> instruction (with reservation for what happens on the stack in some
> cases?).
I think all writes are safe places to interrupt the CPU (a PSH would be 
just a known address sta)
> But that could on the other hand take some time as it's
> possible to write code that runs for a long time without any writes
> (especially in an idle loop).
THat was noted by Gideon as well.

Jim