Re: Hardware emulation of 6509 using 6502?

On 6/28/2018 6:28 PM, Jim Brain wrote:
> On 6/28/2018 1:28 PM, Michał Pleban wrote:
>> Hello!
>>
>> Jim Brain wrote:
>>
>>> The current code will not work on the previous board.  The previous
>>> board did not sit in between the Data path.  This one does.
>> I understand that, but I just want to look at the current Verilog code
>> because otherwise I will have no idea what is causing the errors.
>> Generally it looks like the four topmost bits are set to 1 but not
>> always (because read bank direct 1 passes OK), without the actual
>> hardware in hand I can only deduce the cause by looking at the Verilog.
> Working on getting code up online
>>
>> Also please post the results of the tests from the previous board - do
>> they differ in any way from the current board?
>
> Old board:
>
> OK
> OK
> OK
> OK
> OK
> FF, expected 0F
> OK
> FF, expected 0F
>
> New board:
>
> OK
> Ok
> Ok
> OK
> Ok
> FF,0F
> F0,00
> FF,0F
>
Fixed:

assign oe_bank =                          r_w & phi2_6509 & ce_bank;

Needs to be:

assign oe_bank =                          r_w & ce_bank;

For academic purpose, checking old board.