Re: Hardware emulation of 6509 using 6502?

Quoting smf <smf@null.net>:

> On 16/07/2018 16:28, Jim Brain wrote:
>> Note that the '816 does not offer an SO pin, and I see no way to  
>> emulate it on
>> the '816 using the CPLD.  I will, though, try to route the pin  
>> through the CPLD
>> and optionally connect it when non '816 configuration is selected.
>
> You could route it to the abort input, it's not going to be as fast  
> as it pushes registers and then jumps to ($ffe8). But you could  
> write code that sets the overflow flag and returns, so that  
> applications might work.

You could also write some Verilog which, after an SO transition is  
detected, causes the next fetch of a BVC instruction to be replaced  
with a BVS instruction, or vice versa as the case may be. This is only  
slightly far-fetched; I've successfully done lots of stuff like this.  
(It helps to have a sense of humor! But if the SO problem is taken  
seriously then this is a credible solution.)

I like smf's solution, too, although neither is guaranteed to work in  
all cases. His solution involves a substantial speed penalty but does  
in fact set the V flag. Mine is very fast (worst case: the op-code  
substitution might require a wait-state, but that only happens once  
per transition). It does have vulnerabilities, but in practice they  
may be unimportant. Example: the approach fails if a single transition  
of the V flag gets tested more than once by the software.

-- Jeff