On 07/09/2018 08:57, Konrad B wrote: > Hint 2 (for Smf): what does the fig. 5 in the 6551 CSG/MOS datasheet suggest ? It shows that XTAL1 & XTAL2 go in to a black box baud rate generator, the datasheet documents that the baud rate generator supports 15 rates. It doesn't give any indication how the 0,0,0,0 case is handled inside. Hint (for Konrad) What you think it's suggesting is what you already assume. On 06/09/2018 19:58, Mia Magnusson wrote: > By looking at how Plus/4 and A2232 works, we can be 100% clear that > the /16 division is made no matter if you use a crystal or an external > clock signal. Plus/4 uses a crystal and A2232 uses a clock signal, both > have the same frequency, and both achieve the same baud rates. The /16 is always active, even the output from the baud rate generator is divided. I accept that it works, but this brings to mind the Expert ESM where it works by glitching the nmi line. It's hard to argue that just because something works that you can draw any conclusions about whether it was supposed to. On 06/09/2018 19:58, Mia Magnusson wrote: > They of course did choose what IC's Commodore made in-house as they > seemed fit for purpose, an 8-bit CPU and UART's that were specified to > run at up to 19200 baud. Specified up to 19200 with a crystal, but specified to work up to 125k with an external clock. So it's a flawed argument to say that 19200 was this huge number that nobody thought of exceeding. A single line in the datasheet that you shouldn't do it, or that you will end up with a baud rate of 115200 would have solved this debate. It's a baud rate that intel supported in the 8250 in 1978, while the 6551 seems to have come out in 1980. If it's supported then it's a serious ommision in the datasheet, which should be explicit about everything that is supported.Received on 2018-09-08 12:00:05
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