Thank you, that means I have to dig into the code of those 6502 implementations because they don't seem to do that and behave incorrectly. On Wed, Mar 6, 2019 at 3:22 AM Segher Boessenkool < segher@kernel.crashing.org> wrote: > Hi! > > On Tue, Mar 05, 2019 at 09:35:52PM +0100, Istvan Hegedus wrote: > > It seems the FPGA 6502 cores don't set the I flag to > > high during reset, I have tried 2 cores, T65 and FPGA64 project's core > but > > both behaves nearly the same. The 6502 datasheet says that Interrupt flag > > is set after/during reset . Is it the CPU implementation wrong or it > should > > really behave like this? > > One thing is sure, after power up these cores have the I flag set but > RESET > > does not affect the flag. > > The I flag is turned on in phi2 of cycle 6 of a "brk" instruction (while > fetching the high vector address). The CPU does not turn it off again > automatically. > > That "brk" is artificially inserted for the reset (the same way as all > other interrupts do this: pulling the predecode register low). > > > Segher > >Received on 2019-03-06 11:00:03
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