Thanks Michał for the testing. I have updated the github repository with the v4 code here: https://github.com/go4retro/Fake6509. I see a few straggling GPL v3 notices I need to fix, but as previously noted, the project and files are released under the MIT license. A few notes: * As Michal shows, the PCB and CPLD support the NMOS 6502, CMOS 65C02S, and 65C816S in emulation mode * I have also added support for the 65C816S in native mode, in which the bank register is driven directly by the 'C816. Placing the CPU into native mode will also switch into this mode, which means care must be practiced to set up the '816 bank to match the current 6509 'Execution Bank' before switching into this mode. Location $0 and $1 will still be visible while in native mode in the current HDL. * The upper 4 bits of the bank registers can be enabled for all 6502 variants and for both emulation and native mode for the 'C816 by sending $55,$aa,$00,$01 to $0001. In this mode, the upper 4 bits of the bank register are present at 4 pads on the PCB and will be returned during reads of the specific register. The upper 4 bits will follw the lower 4 bits concerning usage (i.e., in native 'C816 mode, they represent the upper 4 bits of the '816 bank register). Use of the upper 4 bits in practice is left as an exercise by the CBM-II owner. For those interested, I will determine pricing and place a pre-order on my site in a few days (I need to get a quote from the assembly house). JimReceived on 2020-05-29 21:35:06
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