Re: C64 MMU POC

On 7/8/2019 7:32 AM, David Wood wrote:
> 4K seems like a good page size, and an 8-bit page register will get
> you to a roomy 1MB memory to work with.  Not a lot by today's
> standards but quite nice on a c-64 :)
I was leaning more towards that, as it makes understanding the code a 
bit easier, when you know the top nybble is an MMU index.
>
> The C64 256k expansion by Mäkelä and Pessi used 16k pages to keep the
> logic simple and may be a reasonable study case too.
I have the design here.  I do find they were limited by constraints I 
don't have, so I am trying to sort out what decisions they made due to 
those constraints and what decisions they made outside of them.
>
> If you're designing new core logic I'd have a personal bias for 4k
> pages as it improves allocation granularity and reasonably complex
> tools written in 6502 assembly may fit well in 4k if assisted with an
> external shared library.
Well, one can map more than 1 page, of course, but I note your point.
>
> Side note- if shared libraries are a consideration it may be a good
> idea to be able to write-protect memory pages to avoid having a shared
> code segment damaged by a malfunctioning program. :)
Yep, ahead of you.  I am playing with this, as I've implemented a 
similar MMU on the TANDY CoCo system (the CC3 uses a 8kB page size MMU 
granularity) with write protection and 32MB max RAM and "IRQ on write" 
functionality as well.  Not sure if the IRQ feature makes sense on the 
6502, but can see.
>
> -David
>
>
>

-- 
Jim Brain
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