> On 2019-08-27, at 00:35, André Fachat <afachat_at_gmx.de> wrote: > >>>>>> It might be easier to do what Commodore has done in the 1570/71 and >>>>>> use an additional 6526 just for the shift register. Then borrow the >>>>>> code from the 1571. >>>>> >>>>> That would most likely be the solution that requires the least amount >>>>> of work to get it up and running. >>>>> >>>>> Captain Obvious says that the con is of course that it needs a CIA. For >>>>> a one-off or general DIY project that might not be a problem, but if >>>>> someone were to order a bunch of PCBs and sell either as a complete kit >>>>> or ready-built thing it might be troublesome to source CIAs. >>>> >>>> Pulling a CIA's shift register off a PLD would be Captain Obvious next >>>> advice ;-) >>> >>> And then you need to add logic to put this CPLD somewhere into the CPU >>> address space. >> >> Yes. >> >>> Ok that probably goes into the CPLD as well :-) >> >> And yes :-) >> >> I have somewhat similar (PIAs parallel port) done for the next Dolphin and >> its parallel connection. This allowed to drop all the six (sic!) glue >> logic ICs AND the full VIA/CIA/PIA chip in favour of one CPLD. > > Interesting. What CPLD do you use? The first proof of concept was done on a Xilinx 9572 but as we (I do it with a friend of mine) specified a lot more stuff to be packed in there, we moved to Altera EPM7128 where we have enough room and pins to cover the whole requirements set. Since those chips are (both, actually) "obsolete", even if still somewhat available, the fallback is for Atmel ATF15xx, which is a pin-compatible "superset", is still in production and can be programmed with JEDEC files converted from Altera's ones (so that we can stay with VHDL). Alternative would be to recode the thing in CUPL, which I'd rather not do ;-) > with 5V tolerance? With full 5V "capability". No "tolerance" needed ;-) > What supply voltages are needed? 5V alone (supplied to both VCCint and VCCio) > Through hole package? Which one (DIP, PLCC, ...) PLCC on a through-hole socket[*] >>> You also need to make sure you have the right output drivers. >> >> True. Works for me so far but the parallel is a bit different (directly >> wired to the CIA through USER PORT) > > Yeah, there you can use totem pole drivers (std TTL or even CMOS). In the > IEC case with potentially multiple drivers you need something like open > collector drivers.... Right. I don't use it (as I don't need it for parallel, where I have 1:1 wiring between only two devices) but the pins can be configured as equivalent open-drain outputs, which should do what's needed for IEC, w/o additional OC buffers (like 7406s for example). * - the final product needs to drop the THT socket but only due to mechanical constraints. -- SD!Received on 2020-05-29 22:56:21
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