Re: VC1541 with fast serial?

From: André Fachat <afachat_at_gmx.de>
Date: Mon, 26 Aug 2019 15:21:21 +0200
Message-ID: <16cce169068.27ff.b4d1f2b66006003a6acd9b1a7b71c3b1_at_gmx.de>
Am 26. August 2019 15:16:09 schrieb Francesco Messineo
<francesco.messineo_at_gmail.com>:

> On Mon, Aug 26, 2019 at 2:28 PM <afachat_at_gmx.de> wrote:
>>
>> On Montag, 26. August 2019 14:02:22 CEST groepaz_at_gmx.net wrote:
>>> Am Montag, 26. August 2019, 13:53:21 CEST schrieb afachat_at_gmx.de:
>>>> Hi there,
>>>>
>>>>
>>>> has anyone actually every tried to convert the VC1541 to use the fast
>>>> serial bus of the C128?
>>>>
>>>>
>>>> As I see it, on the UC3 VIA here http://www.zimmers.net/anonftp/pub/cbm/
>>>> schematics/drives/new/1541/short-251748-rev.E-left.gif there still are
>>>>
>>>>
>>>> - Port A0-7
>>>> - CB1
>>>> - CB2
>>>>
>>>>
>>>> unconnected. These could be used to
>>>>
>>>>
>>>> - CB1/2 shift out under T2 control and
>>>> - PA0-7: connected to a 74LS164 serial-to-parallel shift-in register
>>>>
>>>>
>>>> The only other thing needed would probably be a 74LS14 Schmitt trigger
>>>> input driver, a 7406 output driver, and potentially replacing the PB6
>>>> drive ID input with an SRQIN input, and of course a fly-wire to the IEC's
>>>> SRQIN pin 1.
>>>>
>>>>
>>>> What do you think?
>>>
>>> you also need some extra synchronisation to eliminate the via bug with
>>> external clocking (which is basically the reason for why its not used in the
>>> 1541). i vaguely remember it being described in either one of the
>>> datasheets, or perhaps application notes.
>>
>> The VIA's shift register bug only happens on shift in under external clock.
>>
>> That is why the VIA's shift register is only used to shift out, and the shift
>> in in my proposal happens via the extra 74LS164 serial-to-parallel shift-in
>> register, and be
>> presented as byte value on PA
>
> the 6522 bug can be avoided by clocking the data-in on the rising edge
> of phi2, it takes half of a 74LS74 to do that (or HCT74 for the modern
> guys among us).

Using this approach you would also need circuitry to decide when to send
and when to receive, the HCT74 of course only works on rx and must be
switched off during send.

I thought the shift register solution is much simpler. And somewhat proven
as I used this approach e.g. in my SPI interface for the PET userport (with
an USB chip attached)

André

>
>
> Frank IZ8DWF
Received on 2020-05-29 22:59:04

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