Re: VHDL

From: Richard Atkinson (rga24_at_hermes.cam.ac.uk)
Date: 2000-09-25 21:30:49

On Mon, 25 Sep 2000, MagerValp wrote:

> The demo:ed prototype runs in 512x400, 640x480, 800x600 and 1024x768.
> It plugs into the SID socket and utilizes unused SID registers. Video
> is addressed as 8x8 cards where each card can use 4 colours from a
> palette of 4096. The prototype that broke down a couple of days before
> the EXPO did 24-bit, but it required a bit of external logic as she
> only has an 84-pin FPGA to work with and she didn't have time to
> implement that. It has one sprite with a freely selectable resolution
> but this wasn't demo:ed. Also, the screen contained garbage as she
> didn't have any software to use the card, and there was a palette bug
> that she hadn't worked out yet.
>   I gave her the subscribe information for cbm-hackers so hopefully
> she'll be able to tell you everything about the project herself.

I *need* to see this source... my own VIC-II in Verilog project got
started a few weeks ago but it's very slow going. :(


Richard.

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