On Thu, Jul 30, 2020 at 12:59 PM tokafondo <tokafondo_at_gmail.com> wrote: > > One question for you guys: > > What if instead of creating a new 8701, a small board integrating the old > style of dividing the clock could be made? actually the IC I've used in my replacement, the ICS525-01, is a complete PLL chip, having internally a very similar functionality as the earlier discrete PLL implemented in the fist few releases of the C64. The 8701 on the other hand, is not a PLL chip (as far as I could read around) but it relies on digital dividers and delays to produce the clock frequencies. So any replacement based on an integrated PLL chip is actually "closer" to the old style C64 clock generator. > In the earlier revisions of the C64, the schematics show a bunch of 74LSxx > chips doing the clock division. a PLL loop is quite more than "division". There're reference and output dividers, there's a phase/frequency detector, there's a Voltage Controlled Oscillator (aka VCO) and of course a crystal reference oscillator, and another bunch of passive components to filter and adjust levels where needed. I've attempted to fit an "old style" PLL circuit into a reasonably sized PCB, using SMD chips, but that wouldn't be enough small to become a real general purpose 8701 replacement. However, on the SX64 mainboard, the clock generation is done by a small-ish daughterboard that seems using two crystals, which is a very interesting technique also. I haven't found the schematic of this small board anywhere and I didn't really feel like desoldering one out of one of my SX64. I can guess they use a sort of injection lock mechanism to lock the two frequencies together, but unless someone can come up with the real circuit, it will remain a guess. > > Could that be replicated in a FPGA or CPLD module, instead of using this > small chip? maybe, but that wouldn't be worth it, imho. Frank IZ8DWFReceived on 2020-07-30 14:01:02
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