Re: 16 bit data bus on a 6502.

On 10/12/2020 12:13 PM, tokafondo wrote:
>
> Having two 65xx chips running in parallel, clocked by the same source,
> connected every one of them to the same 16 bit data bus of a single RAM
> chip. But one would go to the MSB and the other one to the LSB.
>
> They would be running the very same software, stored in a ROM, or in a RAM
> chip belonging to a different chip select line than the RAM chip they would
> be sharing.

I'm not sure how that would work in practice.

Assuming for the moment that your idea is that the "code" ROM is 8 bit 
and fed to both at the same time, but data requests are 16 bit, I would 
still think issues like:

lda mem1

bmi loop2

Will fail for memory values like 0x8000, because the MSB 6502 will take 
the branch, but the LSB 6502 will not, and then both will be out of sync