On Wed, Jan 06, 2021 at 08:27:29AM +0100, Gerrit Heitsch wrote: > On 1/5/21 10:27 PM, peter_at_rittwage.com wrote: > >This has been tested to fix the issue with a cap on the CS line? I'll > >have to try it. > > > >It seems like I've put HMOS VIC-II into an older board (fixing the > >voltage issue) and it had the dots, but that may not matter, as you > >mentioned. > > > >I assume this is the line that goes from CS to the "VIC" pin on the new > >PLA on a 250469? Trace cut and put cap between them? > > No. You'd have to put a cap between the /CS on the VIC and GND. Yup. Just a low-pass filter, used as a crappy delay. I would put it close to the pin on the VIC, but that may not matter much. > You shouldn't do that though. We only did it to show what causes the problem, yup. But would it even cause any problems? You're only delaying #CS by 40ns or so (if you do it right ;-) ), that's well within allowed timing, it just avoids the annoying light-grey blips. (Not that I think people should do this!) SegherReceived on 2021-01-07 05:00:03
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