Re: CIA old/new?

On Sun, Jan 10, 2021 at 10:32 PM <groepaz_at_gmx.net> wrote:
>
> Am Sonntag, 10. Januar 2021, 22:19:44 CET schrieb Francesco Messineo:
> > On Sun, Jan 10, 2021 at 10:08 PM <groepaz_at_gmx.net> wrote:
> > > Am Sonntag, 10. Januar 2021, 22:00:53 CET schrieb Francesco Messineo:
> > > > On Sun, Jan 10, 2021 at 9:58 PM Gerrit Heitsch
> > > >
> > > > <gerrit_at_laosinh.s.bawue.de> wrote:
> > > > > (*) I think only the 8500/6510 pair cannot be told apart via software.
> > > >
> > > > I have had success with this but I still need to make some other tests
> > > > to have a reliable routine.
> > > > I only have 2 x 8500 at home, so my sample size is very limited.
> > >
> > > testing the bit fade time of the CPU port?
> >
> > of course, I can't think about any other way.
> >
> > This is a reliable indicator of die temperature, since gate leakage is
> > function of the die temperature. It's very different between
> > NMOS and HMOS-II. However I've found some broken 6510 that couldn't be
> > tested (the "1" level fades before it can even be read
> > back).
>
> It's not reliable for telling them apart from my experience... you get a quite
> high success rate, but still not 100%

my 8500 when very well warm are still slower than a very cold 6510, so
my limited sample size is 100% reliable.
However, I've also found the 6510 of some friends to give a bit too
broad results.
Of course the loop must run with VIC-II blanked and interrupts disabled.
I have another idea about a test but I've never had the time to write
some code for it. It would *maybe* work if the input gates
of the bits 6 and 7 are very close in the die.

Frank