On 6/2/21 5:03 PM, groepaz_at_gmx.net wrote: > Am Mittwoch, 2. Juni 2021, 14:58:04 CEST schrieb silverdr_at_wfmh.org.pl: >> Do we know / have any data about what board/VIV-II combination is the most >> prone to the said error? So far I was able to reliably reproduce it (with >> VSP-Lab) using 250425 board and 6567R56A VIC-II (which is in fact quite >> different from all other variants in respect to timings) but I need to test >> it on PAL too. While I remember finding hardware combination exposing the >> issue some good time ago but now I seem to be unable to find it again. > > It depends very much on the individual components on the board (PLA. RAMs, > VICII, probably more). The PLA should not be involved since /RAS doesn't go through the PLA. From how I understand how it works (address lines changing too close to /RAS going LOW), it would be a combination of VIC and RAMs and maybe clock jitter. Plus, of course, temperature. GerritReceived on 2021-06-02 18:03:13
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