On 02/06/2021 00:38, Jim Brain wrote: > unless the app is video consumptive, in which case there was no point > to push the VIC-II off the bus in the first place. Unless he didn't realise what the overhead would be. > A few TTL ICs to buffer the busses and stretch the clock is well > within most hobbyists. > > Time slicing SRAM access to VIC and CPU requires significantly more > logic (data latches for reads, logic to know when to use them, etc.) > and I think is well above the OP's current request. > You're essentially time slicing SRAM access either way, it's the addition of a latch to shorten the vic2 fetch time slice that is the main difference. But of course it's up to him what he wants to pursue.Received on 2021-06-02 20:00:05
Archive generated by hypermail 2.3.0.