Nobody said what speed the 6502 emulating the vic2 would be running at ;-) With what I suggested you still need the priority encoder from the vic2 and the shift registers. For the background you might use 3 buffers (colorram, text, font/bitmap) if you went for an entire line then they are 40 bytes each. I don't think it's practical, in any conceivable way. There are very good reasons why you implement such things in hardware. You could do a video chip with a 6502, in a similar way to the ZX80/ZX81 uses a Z80 (it purely used the CPU as an address sequencer). You would feed the 6502 instructions so that it produced an ever increasing address, you would instead connect the data up to the ROM address and load a shift register off the ROM data. Probably not a single byte NOP as that is a 2 cycle instruction, feeding in $C9's would do it as long as you save the processor status (cpu would run CMP #$c9 40 times). On 05/06/2022 20:34, Gerrit Heitsch wrote: > On 6/5/22 21:23, smf wrote: >> The VCS had the CPU calculate graphics and then place them into into >> shift registers. > > Yes, but at a lower resolution with a faster CPU und not even a single > line. > > Gerrit > >Received on 2022-06-06 00:00:08
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