On Mon, Jun 20, 2022 at 2:44 PM <silverdr_at_srebrnysen.com> wrote: > > I suspect you'd need some kind of programmable logic (like a cpld or > > fpga) to cope with the timing requirements, plus some kind of > > microcontroller with built in usb/ethernet/wifi etc to talk to act as a > > bridge between the pc and the cpld. > > Right. Something like this, maybe (all you mentioned included) ? > > https://cld.silverdr.com/s/zwa8322K2drLCym > > Another way might be to replace 6510 itself, with something like this: https://microcorelabs.wordpress.com/2021/04/16/mcl64-mos-6510-emulator-works-in-commodore-64/ I built a copy of this project some time ago and explored some topics: - trapping Kernal tape LOAD to read files from SD card directly to memory, DMA-like - simple, non-cycle exact REU emulation - 8K/16K cartridge emulation and ROM switching - ROMs stored in Teensy flash - CPU emulation modes changed during runtime - cycle exact, faster (only writes go through to onboard RAM), fastest (everything happens in Teensy's RAM, ignoring system clock); depending on address range - external access through Teensy serial port - I went with the concept as far as implementing machine monitor 'M' command to dump memory of the running system It works, but once I checked that it is possible I put it on hold. The bus interface code from the original author desperately needs rewrite to use interrupts instead of busy waits and some kind of queue for onboard RAM reads/writes. In its current state it is fine as a replacement for a broken 6510 though. ytmReceived on 2022-06-21 11:00:04
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