I'm guessing that this compromise works in favor of 2 and 3 byte instructions and actually saves 1 cycle on them? --- Marko_Mäkelä <msmakela@cc.hut.fi> wrote: > On Thu, 15 Mar 2001, Ruud Baltissen wrote: > > > The only thing I can think of is that the author > made the same mistake as I > > did: assuming that the above 1 byte commands only > take one cycle. Personal > > remark: why do they need two??? > > Because the processor decodes the instruction opcode > while fetching the > second byte of the instruction. In the beginning of > the 2nd cycle, it > does not know whether it'll be a one-byte > instruction or not. This > greatly simplifies the design, I think. > > Another peculiarity is the JSR instruction. The > high byte of the address > is not read until the last (6th) cycle. If I > remember correctly, also the > return address pushed on the stack is incremented by > one by the RTS > instruction. > > Marko > > - > This message was sent through the cbm-hackers > mailing list. > To unsubscribe: echo unsubscribe | mail cbm-hackers-request@dot.tml.hut.fi. ===== Get a FREE 6Mb webmail box from go6502! - http://www.geocities.com/profdredd As low as 2.99% Intro APR from NextCard! - http://www.nextcard.com/index6.html?ref=aff0074521 PayPal is the FAST FREE and SECURE way to send money! - https://secure.paypal.x.com/refer/pal=profdredd%40yahoo.com __________________________________________________ Do You Yahoo!? Yahoo! Auctions - Buy the things you want at great prices. http://auctions.yahoo.com/ - This message was sent through the cbm-hackers mailing list. To unsubscribe: echo unsubscribe | mail cbm-hackers-request@dot.tml.hut.fi.
Archive generated by hypermail 2.1.1.