Hello, > > Hook it up the same way the 6526 is hooked up ;) > Unfortunally this is not possible :( The reason is technically: (if my > memory serves me well) the 6522 already expects a valid address on the > rising edge of CLK2. And we all (should) know that the VIC-II controls the > lower half of CLK2. The trick is to delay this rising edge so long as needed > to give the 6510 some time to output a vilid address. But I'm not familiar > with the exact timing and I know Frank is. fine, Ruud! This is the first time someone confirms the memory of different timings which I have, too! I asked some time ago (1 year?) in comp.sys.cbm if anyone knows about any timing difference, but never got an answer. I remember seeing an article giving a solution to this problem by delaying one edge (according to your description, it must be the rising one) of PHI2. Anyway, I don't know where that was. Anyway, I remember that the author also mentioned that in most cases, this delaying is not necessary in reality, so the 6522 (or 6821, with the same problem) should work good in the C64, too. Just my memory, Spiro. - This message was sent through the cbm-hackers mailing list. To unsubscribe: echo unsubscribe | mail cbm-hackers-request@dot.tml.hut.fi.
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