----- Original Message -----
From: "Richard Atkinson" <rga24_at_cantab.net>
> Sounds like you're manually asserting the processor bus using the
> SuperCPU. Are you using write accesses, or read accesses from the
> appropriate area of video memory so that the DRAM chips assert the bus?
>
> Either way, AEC is always high during these first three cycles (the CPU
> half thereof) and so the 4066 analogue switch must always be enabled,
> making D11 - D8 the same as D3 - D0.
>
Hello.
Thanks for that piece of information. That pretty much explains why the %11
bitpair in multicolor mode will take on the same color as the lower nybble
of the video matrix in the first three columns of the FLI screen. So,
manipulating the %11 bitpair in multicolor mode *independently* in the first
three columns of the FLI screen is physically impossible with the VIC-II
chip, even with the assistance of the SuperCPU.
Still, I'll live and be happy with the ability of the SuperCPU in
manipulating the %01 and %10 bitpairs of the first three columns of the
multicolor FLI screen. It presents us a decent range of color possibilities.
Also, $d021 is available as a color choice for the %00 bitpair in the first
three columns. I referred to $d020 in an earlier posting regarding changing
the color of the background register on every scanline. A small typo--It
should have been read as $d021 and now is referred to as the $d021 feature.
So, by combining the $d021 feature and the full-screen FLI mode for the
multicolor mode will give us a greater degree of control over color
selection and bitmap drawing. It is certainly exciting times for our
SuperCPU's... :)
One other thing; Is using the $d021 feature feasible on full-screen IFLI's?
Enjoy.
-Todd Elliott
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