From: Marko Mäkelä (marko.makela_at_hut.fi)
Date: 2003-06-24 20:58:48
----- Forwarded message from owner-cbm-hackers@cling.gu.se -----
Date: Tue, 24 Jun 2003 12:21:02 +0200
To: cbm-hackers@cling.gu.se
From: Michael Huth <enigma@mail.lipsia.de>
Subject: UART Autoflow Prob at C64/C128
Hello,
we made an interface with RS232, IEEE488 and IDE functionality.
A while ago I made the routines for the 16C550 Uart and I discovered
two things that are described in the spec sheet, but that I could not get
working.
First thing is, Bit 1 and 2 in the Fifo Control Register should clear the
Fifos, Shift Register and Fifo counter. I could not get this work, I
thought it could be quite useful to purge the fifos.
Second and more disturbing thing is: The 16C550 should feature an autoflow
control for RTS/CTS handshake. The spec sheet described that the chip
deactivates RTS if the Receiver Fifo runs beyond the Trigger Level. Well, I
tried to use the autoflow control, but after several fifo overrun errors, I
found out that the RTS autoflow does not work. RTS simply stays active,
even if the Receiver FIFO runs full.
I set RTS now by software. This after all has the problem, that the latency
time until the software recognizes a full buffer and deactivetes RTS is
longer. So at high baud rates, there will be data loss. (f.e. at 1MBaud ca.
17 cycles at 1Mhz)
Someone got some experience with this?
Ciao...
...Micha
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