From: Laze Ristoski (lazeristoski_at_veenstaete.nl)
Date: 2003-09-03 19:58:17
Hi,
Been working on DMA Delay (VSP) and with such
tricks, new questions arise. :)
This is specific to bitmap mode, and I can't find it
documented in the VIC article by Christian Bauer.
It says about VC, VCBASE, VMLI, which are used
for C-accesses and in case of a bitmap, they are
used for color information. But VIC must keep track
of the bitmap itself. And I'd really like to know about
the behavior of this register(s).
When I generated badline at cycle 14 (no badlines
before on the current frame), the last rasterline of the
first charrow got displayed, immediately followed
by the second charrow (!). RC is 7 at the line where
I generated badline, so it seems that if RC=7 and
a badline condition was given, the register (whatever
it's called) is increased to point to the next charrow.
When I tried doubled textlines here (cycle 54 instead of
14), the first rasterline was empty, immediately followed
by the first charrow. So, I guess the register was pointing to the
base of the bitmap + 8000 (dec). As there were no C-accesses,
the first rasterline was empty. Then, there was a badline where
RC=7, so the register needs to be incremented, and it resetted to 0.
How does it know if it's time to do so?
CCS and VICE emulated this, so Andreas Boose and Per
Hakan Sundell know this issue. :)
I think it's a wise idea if people who worked on various
emulators get in touch, and write the ultimate VIC article,
with every known detail explained. Don't let this knowledge
fade away. :)
Long story short: In char mode VIC makes C-accesses to
read characters. The memory address which is G-accessed is
determined by base of charset + 8*char code + RC.
How is the memory address determined with bitmap?
--
Laze
lazeristoski@veenstaete.nl
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