From: Gabor Lenart (lgb_at_lgb.hu)
Date: 2005-04-20 09:39:48
Hello, I'm working on a system (well, at least on idea about such a system) where the 64k address space 65c02 can address is paged into a much larger memory space, I mean every page (256 bytes of memory starting at a 256 byte aligned address) can be assigned to let's say any of 65536 possible 256 byte sized page (that's 16Mbyte). Also, there would some hardware support for task switching (so we're talking about multitasking system), there would be several mappings, one for each task (can be process or a thread). "task switching" would be only a selection of a mapping to use (well, for real it's more complex, you should also save registers etc). As you can see, you can even share memory between two (or more) tasks by mapping the same physical (from the 16Mbyte memory space) page into two (or more) address space mapping for 65c02. The whole story is a software based 65c02 simulation of course. Other stuffs like syscalls, 'kernel' vs 'user' space is not mentioned here, btw. The problem is about threads. If we're talking separated processes, each can have its own memory space. Threads can be implemented easily as normal processes but with the same memory context. Of course the stack cannot be shared, so page #1 (stack) should be private for each processes. This whole long story is about only one thing: what's about zero page? From the view point of 65c02, it's "normal" memory, but there're addressing modes to address zero page locations with only one byte length addresses. However I'm very interested in question that common softwares for 'advanced' operating systems running on such a CPU can run in this envirnoment without major modification? I mean, for example: what's about a C program, compiled with cc65 and running here? if I have an OS with possibility of creating threads with some hardware support I've described, what about the zero page? Will threads work as usuall if I have shared zero page? I assume no, since as far as I know, cc65 uses zeropage locations as argument stack and such ... So I have to use private zero and stack page for each threads? And it's not only about cc65 but eg binaries of other OSes. I would say again and again: my English is too bad to be able to express myself, so maybe this mail seems very complicated and even stupid. Sorry about that! So in nutshell: because mmu uses 256 byte long pages, zero page should be private OR shared. There is no 'mixed' solution. What do you think about this whole issue? - Gábor Message was sent through the cbm-hackers mailing list
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