From: A. Fachat (afachat_at_gmx.de)
Date: 2005-04-21 10:56:24
Gabor Lenart wrote:
>Hmm, I've thought such a design with a separated SRAM: address input lines
>of SRAM is the page number to look up, and the read value from the memory
>will be the mapped address. Unfortunatelly I don't know how can you MODIFY
>the mapping table without mess up the whole simple design. And the timing
>... :)
>
>
Timing is not the problem. During Phi1 read the SRAM using the address
lines of the CPU. Then latch
the output. During Phi2 allow the CPU to access the SRAM e.g. memory
mapped. I have implemented
similar designs with my CS/A boards, see the "keyboard emulator" board
or even the video board on
http://www.6502.org/users/andre/csa/index.html
It is still a "simple" design, but needs quite some extra ICs though :-)
André
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