From: Scott McDonnell (netsamurai_at_comcast.net)
Date: 2007-04-08 23:00:34
Of the 512 clock cycles, the first 256 cylces are used to completely discharge the cap. The second 256 are used to count the time it takes for the cap to charge to 50% of VCC (or 2.5V) From my calculations: Given a known C of 1nF and a max of 256uS (256 clock cycles) and a minimum of 1uS (1/1MHz = 1 clock cyle in seconds) Max resistance is actually 371K ohm (would take 256uS to charge to 50%.) Min resistance is about 1.75K ohm (would take 1uS to charge to 50%.) Notes: I used 1MHz though I know the C64 does not actually run at the full 1MHz I rounded the values up a bit because there is also the 250 ohm through the CD4066 we need to account for on the low end. I was lazy and used this calculator: http://www.cvs1.uklinux.net/cgi-bin/calculators/time_const.cgi The max resistance is going to be a bit lower, since 371K would actually just time out the counter. To emulate all this with a transistor, we need about 3mA to charge the capacitor to 50% in 1uS and about 1.4uA to charge to 50% in 256uS. The problem is the linearity of this. For example: 1.7mA for 2 counts 1.2mA for 3 counts 867uA for 4 counts Not very linear. But, we have a min and a max. Scott -----Original Message----- From: owner-cbm-hackers@ling.gu.se [mailto:owner-cbm-hackers@ling.gu.se] On Behalf Of john/lori Sent: Sunday, April 08, 2007 3:51 AM To: cbm-hackers@ling.gu.se Subject: Re: Commodore joystick ports Scott McDonnell wrote: > 512 cycles, because of the nyquist rate (at least 2x the max desired > sample frequency), perhaps? I always assumed it was for simplicity. You need an 8 bit counter for the ADC, they just added a bit as a simple way to control the timing of the discharge and make sure it lasts long enough to fully discharge. > Yep, this is how I remember it working. I was using a 555 timer and a > counter to emulate the SID pot inputs. I believe this is method is > called a "dual slope integrating ADC." RC time constants are very > predictable. The SID ADC is a single slope integrator. > The only reason I still hold some doubt about this is that the paddles > use 5V, the resistor changes the amount of time it takes for the cap to > reach 63% of 5V. If you input say 2V, it will never reach 63% of 5V. The > resistor never changes the voltage, just the current (or charge rate of > the cap.) So the "decision level" you mention below would never really be satisfied. Which is the beauty of Jim Brains (or whomever's) scheme. I think you could probably even rig a 555 one shot so that it was synced as Jim does. But even a free running oscillator (be it pwm or pulse posistion) should work if it's running fast enough. Message was sent through the cbm-hackers mailing list Message was sent through the cbm-hackers mailing list
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