Re: Additional SIDs

From: Richard Atkinson <rga24_at_cantab.net>
Date: 02 Dec 2011 02:07:23 +0000
Message-ID: <Prayer.1.3.4.1112020207230.17966@hermes-2.csi.cam.ac.uk>
On Dec 1 2011, Rainer Buchty wrote:

>Right. And that bank select signal has a bug :)
>
>If you set the Sync/AM bit upon sync BS will be cleared, too. That's why 
>it was never experienced on the IIGS and ESQ1 (64k machines) and the 
>Mirage (128kB but no use of Sync/AM).

What a strange bug. Presumably BS gets reset along with the phase 
accumulator value for the sync'ed oscillator. It's an odd bug to creep in 
though; the phase accumulator value is not processor-visible state whereas 
the BS bit is part of the Wavetable Size register.

Incidentally, all the documentation I have seen mentions Sync as a mode in 
the Oscillator Control register, but not AM. I know the chip has AM because 
it's on the ESQ-1 and SQ-80 front panel. The modes for a single oscillator 
are Free Run, One Shot, Sync and Swap, using two bits in the Oscillator 
Control register. But there are two Oscillator Control registers in each 
pair of oscillators, so there are really 4 bits for the combined modes of 
the two oscillators. What do you get for each of the 16 permutations?

>> The implementation questions I'd want to answer: can a digital 
>> oscillator chip with 8 bit samples and phase accumulating oscillators 
>> sound good - i.e. as good as SID in the aliasing department.
>
>Sure. After all, 29kHz was right in the league of back-then studio 
>equipment like the E-mu Emulator II, even Fairlight CMI.

I'm not sure how many of them used phase accumulating oscillators. Some of 
them, especially instruments like the Fairlight with dedicated memory and 
CPUs for each voice, may have used divide by N counters. There is a 1 LSB 
jitter in the access pattern of a phase accumulating oscillator, depending 
on the frequency value selected, which does not occur with a divide by N 
counter. This will show up in the final waveform as a deterministic 
artefact.

>> How many output channels to support, 1, 2, 4, 8 or 16.
>
>I'd go for 2. That'd then give 16 voices per 2 oscs where the stereo 
>panning is done via setting the paired oscs volume.

Then you can also send some voices into one channel for filtering by the 
SID, and other voices into another channel for direct output.

>In case you want to use sync/am, it's probably only 14 or 15 voices due 
>to the weird oscillator pairing in hardware.

Not 16? 16 pairs?

>> Each output channel needs a sample and hold circuit and a low pass 
>> filter.
>
>The ESQ1/SQ80 don't use S&H, just a 4051 followed by the CEM3379. So 
>presumably a 4051 plus some filter should be fine.

Would be good to put some of the channels through the SID filter, and have 
the others come out unfiltered. A fixed filter could roll off some unwanted 
aliasing noise, but without a fixed sample rate it's difficult to know what 
cutoff frequency to give it.

Richard

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Received on 2011-12-02 03:00:04

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