Re: about the plus4

From: Nate Lawson <nate_at_root.org>
Date: Thu, 19 Apr 2012 13:42:50 -0700
Message-Id: <0A37D1D0-2881-4BE5-A20A-1280BB206C3E@root.org>
On Apr 19, 2012, at 8:54 AM, Gerrit Heitsch wrote:

> On 04/19/2012 02:53 PM, Anders Carlsson wrote:
>> 
>> When it comes to a replacement for the aging VIC-20, Commodore already
>> had a 40 column chip 6562/63 in development but apparently it never saw
>> its way into production.
> 
> From what I read that chip was working, but needed rather expensive SRAM since it used the 'no badline' approach of the original VIC. That meant 2 memory cycles per 8 Bits displayed.
> 
> I could be mistaken, but I think the 6567 was the first VIC that used DRAM, everything before used SRAM, mostly 2114s and later 6116s. Look up their price at that time.

Not only was it SRAM, but it had to be fast SRAM (for the time) and a lot of it (more pixels). Also, the 6562 and 6564 had internal oscillators that weren't properly phase-locked, so temperature caused visible changes.

The 6562 and 6564 were apparently being designed for the TOI and Color PET in the late 70's, which didn't have strict cost constraints because they were targeting the expensive Apple II. I'd suggest that Commodore's engineering-driven culture was at its worst without cost and schedule constraints or when new engineers and poor management let marketers take the lead.

By the time the 6567 was designed in 1981, DRAM prices were coming down low enough to put 64 KB in the machine and the badline design allowed it to be slower RAM.

-Nate


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Received on 2012-04-19 21:00:03

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