When trying to deal with some 4168 XRAM chips, I couldn’t get them to work properly. After studying the datasheet I found in the notes: http://dl.dropboxusercontent.com/u/58002657/4168_notes.jpg Point [2.] seems important to me but I seem to have problems interpreting it unambiguously.. or for some other reasons these RAMs still don’t want to work.. “An initial pause of 2ms is required after power up, followed by any 8 _CE cycles and 64 _RFSH cycles before proper device operation is achieved. Read, write, and external refresh cycles may be used as _CE dummy cycles for initialisation. The 64 refresh dummy cycles can be performed before or after the 8 _CE dummy cycles. Both dummy cycles must be within AC parameters. See figure 1, below." Figure follows as on the picture linked above. How do you understand the above? How should it be interpreted? Please note that e. g. here: http://www.smspower.org/uploads/Development/SegaMasterSystemIIServiceManual-1715922A-1.png the _RFSH is tied up to VCC.. -- SD! Message was sent through the cbm-hackers mailing listReceived on 2014-03-10 21:00:13
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