Re: ROM Dump of Amiga Keyboard controller

From: Greg King <greg.king5_at_verizon.net>
Date: Wed, 02 Jul 2014 22:34:51 -0400
Message-id: <53B4C14B.2050103@verizon.net>
On 2014-07-01 7:13 PM, Jim Brain wrote:
> On 7/1/2014 12:18 PM, Gerrit Heitsch wrote:
>>
>> You made sure you supplied the bytes at half the speed of the clock
>> you supplied to the 6500/1? Then there is, of course the question of
>> phase. Since the external clock is divided by 2, there are 2 possible
>> phases for the resulting clock signal the CPU runs on.
> Yes, each byte send requires 4 CLK transitions (high,low,high,low). I
> synchronized the phase by sending data during the reset phase, to keep
> timing.
>> So my idea is to get the external clock stable while keeping _RESET
>> low, then have it go to +5V for a moment before going to +10V and
>> start supplying the byte sequence.
> I went from RESET to TEST, but can try doing 5V for a bit; and then, doing
> TEST.  Right now, I have:
>
> static inline __attribute__((always_inline)) void send_data(uint8_t data) {
>    PORTC = data;
>
>    while(!(TIFR & _BV(OCF2))); // went high
>    TIFR |= _BV(OCF2);
>    while(!(TIFR & _BV(OCF2))); // went lo
>    TIFR |= _BV(OCF2);
>    while(!(TIFR & _BV(OCF2))); // went hi
>    TIFR |= _BV(OCF2);
>    while(!(TIFR & _BV(OCF2))); // went lo
>    TIFR |= _BV(OCF2);
> }
>
>
>    RESET_ON();
>    send_data(0xEA);
>    send_data(0xEA);
>    send_data(0xEA);
>    send_data(0xEA);
>    send_data(0xEA);
>    send_data(0xEA);
>    send_data(0xEA);
>    send_data(0xEA);
>    send_data(0xEA);
>    send_data(0xEA);
>    send_data(0xEA);
>    send_data(0xEA);
>    send_data(0xEA);
>    send_data(0xEA);
>    send_data(0xEA);
>    send_data(0xEA);
>    send_data(0xEA);
>    send_data(0xEA);
>    send_data(0xEA);
>    send_data(0xEA);
>    TEST_ON();
>    send_data(0xEA);
>    send_data(0xEA);
>    send_data(0xEA);
>    send_data(0xEA);
>    send_data(0xEA);
>    send_data(0xEA);
>    send_data(0xEA);
>    send_data(0xEA);
>    send_data(0xEA);
>    send_data(0xEA);
>    send_data(0x2C);
>    send_data(0x24);
>    send_data(0xEA);
>    send_data(0xEA);
>    send_data(0x78);
>    send_data(0x78);
>    send_data(0xA9);
>    send_data(0x55);
>    send_data(0x85);
>    send_data(0x83);
>    read_data();
>    send_data(0x02);

What does read_data() do?  Does it call send_data(); or, is it as simple 
as send_data()?  If it is as simple, then Port D is being read too soon. 
  The AVR must send a dummy byte during the 6500's write (to the port) 
cycle.  And, there is a propagation delay through the ports.  So, the 
code should be:

    . . .
    . . .
    send_data(0xA9);
    send_data(0x55);
    send_data(0x85);
    send_data(0x83);
    send_data(0x83);
    send_data(0x02);
    read_data();


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Received on 2014-07-03 04:00:02

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